DECODING-AWARE COMPRESSION TECHNIQUES FOR RECONFIGURABLE SYSTEMS By CHETAN MURTHY A THESIS PRESENTED TO THE GRADUATE SCHOOL OF THE UNIVERSITY OF FLORIDA IN PARTIAL FULFILLMENT OF THE REQUIREMENTS FOR THE DEGREE OF MASTER OF SCIENCE
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of Thesis Presented to the Graduate School of the University of Florida in Partial Fulfillment of the Requirements for the Degree of Master of Science DECODING-AWARE COMPRESSION TECHNIQUES FOR RECONFIGURABLE SYSTEMS By Chetan Murthy December 2008 Chair: Prabhat Kumar Mishra Major: Computer Engineering In recent years FPGA are widely used in reconfigurable systems. FPGA are configured using bitstreams often loaded from memory. Configuration data is reaching megabytes because of multiple versions of an IP core are configured on a single FPGA and sometimes because of the multiple IP cores. Limited configuration memory restricts the number of IP core bitstreams that can be stored. Moreover slower memory and limited communication bandwidth limit how frequently IP cores can be reconfigured. One of the promising direction is to compress these bitstreams. Most of the compression techniques exploit redundancies to compress multiple bitstreams but are not suitable for realtime decompression. Other techniques focus on accelerating decompression but compromises compression efficiency [1]. It is a major challenge to design a compression technique which efficiently reduces bitstream size, meanwhile keeping decompression overhead minimal. This thesis proposes a novel bitstream compression technique efficiently combining bitmask and run length encoding for better compression ratio and smart rearrangement of compressed bits for fast decoding. The main contributions of this thesis are; i) decoding aware bitmask based dictionary selection to increase dictionary coverage, ii) run length encoding of repetitive patterns to reduce compressed size, iii) efficient encoding scheme for storing least frequently changing bits and, iv) smart rearrangement of compressed bits into fixed length words that can significantly decrease the decompression overhead. Hard to compress benchmarks are chosen which are widely used IP cores from image
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